STLD MCQ

 

1. If the decimal number is a fraction then its binary equivalent is obtained by ________ the number continuously by 2.
a) Dividing
b) Multiplying
c) Adding
d) Subtracting

Answer: b

2. The decimal equivalent of the binary number (1011.011)2 is ________
a) (11.375)10
b) (10.123)10
c) (11.175)10
d) (9.23)10

Answer: a

3.The quantity of double word is ________
a) 16 bits
b) 32 bits
c) 4 bits
d) 8 bits

Answer: b

4. An important drawback of binary system is ________
a) It requires very large string of 1’s and 0’s to represent a decimal number
b) It requires sparingly small string of 1’s and 0’s to represent a decimal number
c) It requires large string of 1’s and small string of 0’s to represent a decimal number
d) It requires small string of 1’s and large string of 0’s to represent a decimal number

Answer: a

5.The given hexadecimal number (1E.53)16 is equivalent to ____________
a) (35.684)8
b) (36.246)8
c) (34.340)8
d) (35.599)8

Answer: b

6. 100101 × 0110 = ?
a) 1011001111
b) 0100110011
c) 101111110
d) 0110100101
Answer: c

7. On subtracting (001100)2 from (101001)2 using 2’s complement, we get ____________
a) 1101100
b) 011101
c) 11010101
d) 11010111

Answer: b

8. On addition of -46 and +28 using 2’s complement, we get ____________
a) -10010
b) -00101
c) 01011
d) 0100101

Answer: a

9. If the number of bits in the sum exceeds the number of bits in each added numbers, it results in _________
a) Successor
b) Overflow
c) Underflow
d) Predecessor

Answer: b

10. Logic circuitry is used to detect _________
a) Underflow
b) MSD
c) Overflow
d) LSD

Answer: c

11. The advantage of 2’s complement system is that _________
a) Only one arithmetic operation is required
b) Two arithmetic operations are required
c) No arithmetic operations are required
d) Different Arithmetic operations are required

Answer: a

12.Carry out BCD subtraction for (68) – (61) using 10’s complement method.
a) 00000111
b) 01110000
c) 100000111
d) 011111000
View Answer

Answer: a

13. Code is a symbolic representation of __________ information.
a) Continuous
b) Discrete
c) Analog
d) Both continuous and discrete
View Answer

Answer: b

14. When numbers, letters or words are represented by a special group of symbols, this process is called __________
a) Decoding
b) Encoding
c) Digitizing
d) Inverting
View Answer

Answer: b

15. How many bits would be required to encode decimal numbers 0 to 9999 in straight binary codes?
a) 12
b) 14
c) 16
d) 18
View Answer

Answer: b

16. The excess-3 code for 597 is given by __________
a) 100011001010
b) 100010100111
c) 010110010111
d) 010110101101
View Answer

Answer: a

17. A(A + B) = ?
a) AB
b) 1
c) (1 + AB)
d) A
View Answer

Answer: d

18. DeMorgan’s theorem states that _________
a) (AB)’ = A’ + B’
b) (A + B)’ = A’ * B
c) A’ + B’ = A’B’
d) (AB)’ = A’ + B
View Answer

Answer: a

19. (A + B)(A’ * B’) = ?
a) 1
b) 0
c) AB
d) AB’
View Answer

Answer: b

20. Simplify Y = AB’ + (A’ + B)C.
a) AB’ + C
b) AB + AC
c) A’B + AC’
d) AB + A

Answer: a

21. 1’s complement can be easily obtained by using _________
a) Comparator
b) Inverter
c) Adder
d) Subtractor

Answer: b

22. The parameter through which 16 distinct values can be represented is known as ________
a) Bit
b) Byte
c) Word
d) Nibble

Answer: c

23. (170)10 is equivalent to ____________
a) (FD)16
b) (DF)16
c) (AA)16
d) (AF)16

Answer: c

24. An overflow is a _________
a) Hardware problem
b) Software problem
c) User input problem
d) Input Output Error
View Answer

Answer: b

25.  Add the two BCD numbers: 1001 + 0100 = ?
a) 10101111
b) 01010000
c) 00010011
d) 00101011

Answer: c

26. In boolean algebra, the OR operation is performed by which properties?
a) Associative properties
b) Commutative properties
c) Distributive properties
d) All of the Mentioned

Answer: d

27. The expression for Absorption law is given by _________
a) A + AB = A
b) A + AB = B
c) AB + AA’ = A
d) A + B = B + A

Answer: a

28. Complement of the expression A’B + CD’ is _________
a) (A’ + B)(C’ + D)
b) (A + B’)(C’ + D)
c) (A’ + B)(C’ + D)
d) (A + B’)(C + D’)

Answer: b

29. The expression Y=AB+BC+AC shows the _________ operation.
a) EX-OR
b) SOP
c) POS
d) NOR

Answer: b

30. A product term containing all K variables of the function in either complemented or uncomplemented form is called a __________
a) Minterm
b) Maxterm
c) Midterm
d) ∑ term

Answer: a  

31. According to the property of minterm, how many combination will have value equal to 1 for K input variables?
a) 0
b) 1
c) 2
d) 3
View Answer

Answer: b

32. Canonical form is a unique way of representing ____________
a) SOP
b) Minterm
c) Boolean Expressions
d) POS
View Answer

Answer: c

33. A variable on its own or in its complemented form is known as a __________
a) Product Term
b) Literal
c) Sum Term
d) Word

Answer: b

34. _____________ expressions can be implemented using either (1) 2-level AND-OR logic circuits or (2) 2-level NAND logic circuits.
a) POS
b) Literals
c) SOP
d) POS

Answer: c

35. The K-map based Boolean reduction is based on the following Unifying Theorem: A + A’ = 1.
a) Impact
b) Non Impact
c) Force
d) Complementary

Answer: b

36. The prime implicant which has at least one element that is not present in any other implicant is known as ___________
a) Essential Prime Implicant
b) Implicant
c) Complement
d) Prime Complement

Answer: a

37. Product-of-Sums expressions can be implemented using ___________
a) 2-level OR-AND logic circuits
b) 2-level NOR logic circuits
c) 2-level XOR logic circuits
d) Both 2-level OR-AND and NOR logic circuits

Answer: d

38. Each group of adjacent Minterms (group size in powers of twos) corresponds to a possible product term of the given ___________
a) Function
b) Value
c) Set
d) Word

Answer: a

39. Using the transformation method you can realize any POS realization of OR-AND with only.
a) XOR
b) NAND
c) AND
d) NOR

Answer: d 

40. In case of XOR/XNOR simplification we have to look for the following _______________
a) Diagonal Adjacencies
b) Offset Adjacencies
c) Straight Adjacencies
d) Both diagonal and offset adjencies
View Answer

Answer: d

41.  Entries known as _______________ mapping.
a) Diagonal
b) Straight
c) K
d) Boolean

Answer: a 

42. Odd parity of word can be conveniently tested by ___________
a) OR gate
b) AND gate
c) NAND gate
d) XOR gate

Answer: d

43. Which of the following gate is known as coincidence detector?
a) AND gate
b) OR gate
c) NOR gate
d) NAND gate

Answer: a

44. The time required for a gate or inverter to change its state is called __________
a) Rise time
b) Decay time
c) Propagation time
d) Charging time

Answer: c  

45. The output of an EX-NOR gate is 1. Which input combination is correct?
a) A = 1, B = 0
b) A = 0, B = 1
c) A = 0, B = 0
d) A = 0, B’ = 1
View Answer

Answer: c  

46. The code where all successive numbers differ from their preceding number by single bit is __________
a) Alphanumeric Code
b) BCD
c) Excess 3
d) Gray

Answer: d

47. The following switching functions are to be implemented using a decoder:
f1 = ∑m(1, 2, 4, 8, 10, 14) f2 = ∑m(2, 5, 9, 11) f3 = ∑m(2, 4, 5, 6, 7)
The minimum configuration of decoder will be __________
a) 2 to 4 line
b) 3 to 8 line
c) 4 to 16 line
d) 5 to 32 line

Answer: c

48.  How many two-input AND and OR gates are required to realize Y = CD+EF+G?
a) 2, 2
b) 2, 3
c) 3, 3
d) 3, 2

Answer: a

49. The dependency notation “>=1” inside a block stands for which operation?
a) OR
b) XOR
c) AND
d) XNOR

Answer: a

50.  If we use an AND gate to inhibit a signal from passing one of the inputs must be ___________
a) LOW
b) HIGH
c) Inverted
d) Floating

Answer: a

51. Logic gate circuits contain predictable gate functions that open theirs ____________
a) Outputs
b) Inputs
c) Pre-state
d) Impedance state

Answer: b

52. How many NAND circuits are contained in a 7400 NAND IC?
a) 1
b) 2
c) 4
d) 8

Answer: c

53. What is a multiplexer?
a) It is a type of decoder which decodes several inputs and gives one output
b) A multiplexer is a device which converts many signals into one
c) It takes one input and results into many output
d) It is a type of encoder which decodes several inputs and gives one output

Answer: b

54.  Which combinational circuit is renowned for selecting a single input from multiple inputs & directing the binary information to output line?
a) Data Selector
b) Data distributor
c) Both data selector and data distributor
d) DeMultiplexer

Answer: a

55. Which is the major functioning responsibility of the multiplexing combinational circuit?
a) Decoding the binary information
b) Generation of all minterms in an output function with OR-gate
c) Generation of selected path between multiple sources and a single destination
d) Encoding of binary information

Answer: c

56. One multiplexer can take the place of ___________
a) Several SSI logic gates
b) Combinational logic circuits
c) Several Ex-NOR gates
d) Several SSI logic gates or combinational logic circuits

Answer: d 

57. A basic multiplexer principle can be demonstrated through the use of a ___________
a) Single-pole relay
b) DPDT switch
c) Rotary switch
d) Linear stepper

Answer: c

58. The enable input is also known as ___________
a) Select input
b) Decoded input
c) Strobe
d) Sink

Answer: c

59. The primary use for Gray code is ___________
a) Coded representation of a shaft’s mechanical position
b) Turning on/off software switches
c) To represent the correct ASCII code to indicate the angular position of a shaft on rotating machinery
d) To convert the angular position of a shaft on rotating machinery into hexadecimal code

Answer: a

60. A circuit that compares two numbers and determines their magnitude is called ____________
a) Height comparator
b) Size comparator
c) Comparator
d) Magnitude comparator

Answer: d

61. Why latches are called memory devices?
a) It has capability to stare 8 bits of data
b) It has internal memory of 4 bit
c) It can store one bit of data
d) It can store infinite amount of data

Answer: c

62. The first step of the analysis procedure of SR latch is to ___________
a) label inputs
b) label outputs
c) label states
d) label tables

Answer: b

63. When both inputs of SR latches are low, the latch ___________
a) Q output goes high
b) Q’ output goes high
c) It remains in its previously set or reset state
d) it goes to its next set or reset state

Answer: c

64. Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
a) Low input voltages
b) Synchronous operation
c) Gate impedance
d) Cross coupling

Answer: d

65. The truth table for an S-R flip-flop has how many VALID entries?
a) 1
b) 2
c) 3
d) 4

Answer: c

66. Which of the following is correct for a gated D-type flip-flop?
a) The Q output is either SET or RESET as soon as the D input goes HIGH or LOW
b) The output complement follows the input when enabled
c) Only one of the inputs can be HIGH at a time
d) The output toggles if one of the inputs is held HIGH

Answer: a

67.The basic latch consists of ___________
a) Two inverters
b) Two comparators
c) Two amplifiers
d) Two adders

Answer: a

68. The output of latches will remain in set/reset untill ___________
a) The trigger pulse is given to change the state
b) Any pulse given to go into previous state
c) They don’t get any pulse more
d) The pulse is edge-triggered

Answer: a

69. What is a trigger pulse?
a) A pulse that starts a cycle of operation
b) A pulse that reverses the cycle of operation
c) A pulse that prevents a cycle of operation
d) A pulse that enhances a cycle of operation

Answer: a

70. The circuits of NOR based S-R latch classified as asynchronous sequential circuits, why?
a) Because of inverted outputs
b) Because of triggering functionality
c) Because of cross-coupled connection
d) Because of inverted outputs & triggering functionality

Answer: c 

71.The characteristic equation of S-R latch is ____________
a) Q(n+1) = (S + Q(n))R’
b) Q(n+1) = SR + Q(n)R
c) Q(n+1) = S’R + Q(n)R
d) Q(n+1) = S’R + Q'(n)R

Answer: a

72. When is a flip-flop said to be transparent?
a) When the Q output is opposite the input
b) When the Q output follows the input
c) When you can see through the IC packaging
d) When the Q output is complementary of the input

Answer: b

73. What is the hold condition of a flip-flop?
a) Both S and R inputs activated
b) No active S or R input
c) Only S is active
d) Only R is active

Answer: b

74. The circuit that is primarily responsible for certain flip-flops to be designated as edge-triggered is the _____________
a) Edge-detection circuit
b) NOR latch
c) NAND latch
d) Pulse-steering circuit

Answer: a

75. What is one disadvantage of an S-R flip-flop?
a) It has no Enable input
b) It has a RACE condition
c) It has no clock input
d) Invalid State

Answer: d